When a user wants to add or upgrade memory (RAM) in a computer, they need to know how many memory slots are available. The following section will help you to determine the number of memory slots in your computer, as well as how many are currently being used. Another way to get information about.

• Dimm Memory Slots X4 Definition 1

There are some differences between UDIMMs and RDIMMs that are important in choosing the best options for memory performance. First, let’s talk about the differences between them.

RDIMMs have a register on-board the DIMM (hence the name “registered” DIMM). The register/PLL is used to buffer the address and control lines and clocks only. Consequently, none of the data goes through the register /PLL on an RDIMM (PLL is Phase Locked Loop. On prior generations (DDR2), the Register - for buffer the address and control lines - and the PLL for generating extra copies of the clock were separate, but for DDR3 they are in a single part).

There is about a one clock cycle delay through the register which means that with only one DIMM per channel, UDIMMs will have slightly less latency (better bandwidth). But when you go to 2 DIMMs per memory channel, due to the high electrical loading on the address and control lines, the memory controller use something called a “2T” or “2N” timing for UDIMMs.

Consequently every command that normally takes a single clock cycle is stretched to two clock cycles to allow for settling time. Therefore, for two or more DIMMs per channel, RDIMMs will have lower latency and better bandwidth than UDIMMs.

Based on guidance from Intel and internal testing, RDIMMs have better bandwidth when using more than one DIMM per memory channel (recall that Nehalem has up to 3 memory channels per socket). But, based on results from Intel, for a single DIMM per channel, UDIMMs produce approximately 0.5% better memory bandwidth than RDIMMs for the same processor frequency and memory frequency (and rank). For two DIMMs per channel, RDIMMs are about 8.7% faster than UDIMMs.

For the same capacity, RDIMMs will be require about 0.5 to 1.0W per DIMM more power due to the Register/PLL power. The reduction in memory controller power to drive the DIMMs on the channel is small in comparison to the RDIMM Register/PLL power adder.

RDIMMs also provide an extra measure of RAS. They provide address/control parity detection at the Register/PLL such that if an address or control signal has an issue, the RDIMM will detect it and send a parity error signal back to the memory controller. It does not prevent data corruption on a write, but the system will know that it has occurred, whereas on UDIMMs, the same address/control issue would not be caught (at least not when the corruption occurs).

Another difference is that server UDIMMs support only x8 wide DRAMs, whereas RDIMMs can use x8 or x4 wide DRAMs. Using x4 DRAMs allows the system to correct all possible DRAM device errors (SDDC, or “Chip Kill”), which is not possible with x8 DRAMs unless channels are run in Lockstep mode (huge loss in bandwidth and capacity on Nehalem). So if SDDC is important, x4 RDIMMs are the way to go.

In addition, please note that UDIMMs are limited to 2 DIMMs per channel so RDIMMs must be used if greater than 2 DIMMs per channel (some of Dell’s servers will have 3 DIMMs per channel capability).
In summary the comparison between UDIMMs and RDIMMs is

Typically UDIMMs are a bit cheaper than RDIMMs
For one DIMM per memory channel UDIMMs have slightly better memory bandwidth than RDIMMs (0.5%)
For two DIMMs per memory channel RDIMMs have better memory bandwidth (8.7%) than UDIMMs
For the same capacity, RDIMMs will be require about 0.5 to 1.0W per DIMM than UDIMMs
RDIMMs also provide an extra measure of RAS
Address / control signal parity detection
RDIMMs can use x4 DRAMs so SDDC can correct all DRAM device errors even in independent channel mode
UDIMMs are currently limited to 1GB and 2GB DIMM sizes from Dell
UDIMMs are limited to two DIMMs per memory channel

DIMM Count and Memory Configurations

Recall that you are allowed up to 3 DIMMs per memory channel (i.e. 3 banks) per socket (a total of 9 DIMMs per socket). With Nehalem the actually memory speed depends upon the speed of the DIMM itself, the number of DIMMs in each channel, the CPU speed itself. Here are some simple rules for determining DIMM speed.

If you put only 1 DIMM in each memory channel you can run the DIMMs at 1333 MHz (maximum speed). This assumes that the processor supports 1333 MHz (currently, the 2.66 GHz, 2.80 GHz, and 2.93 GHz processors support 1333 MHz memory) and the memory is capable of 1333 MHz
As soon as you put one more DIMM in any memory channel (two DIMMs in that memory channel) on any socket, the speed of the memory drops to 1066 MHz (basically the memory runs at the fastest common speed for all DIMMs)
As soon as you put more than two DIMMs in any one memory channel, the speed of all the memory drops to 800 MHz

So as you add more DIMMs to any memory channel, the memory speed drops. This is due to the electrical loading of the DRAMs that reduces timing margin, not power constraints.
If you don’t completely fill all memory channels there is a reduction in the memory bandwidth performance. Think of these configurations as “unbalanced” configurations from a memory perspective.

References

• RDIMM vs UDIMM

1 Comment

• Mace
  ErikN Oct 23, 2013 at 01:49pm

  That's a lot of good info. For the speed reader, it would be nice to have a synopsis at the end that gave guidance as to which to choose and why.

In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between them. Theoretically this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs two channels. The technique goes back as far as the 1960s having been used in IBM System/360 Model 91 and in CDC 6600.^[1]

Modern high-end processors like the Intel Core i9 and AMD Ryzen Threadripper series, along with various Xeons support quad-channel memory. In March 2010, AMD released Socket G34 and Magny-Cours Opteron 6100 series^[2] processors with support for quad-channel memory. In 2006, Intel released chipsets that support quad-channel memory for its LGA771 platform^[3] and later in 2011 for its LGA2011 platform.^[4] Microcomputer chipsets with even more channels were designed; for example, the chipset in the AlphaStation 600 (1995) supports eight-channel memory, but the backplane of the machine limited operation to four channels.^[5]

• 1Dual-channel architecture
• 2Triple-channel architecture
• 3Quad-channel architecture

Dual-channel architecture[edit]

Dual-channel-enabled memory controllers in a PC system architecture use two 64-bit data channels. Dual-channel should not be confused with double data rate (DDR), in which data exchange happens twice per DRAM clock. The two technologies are independent of each other, and many motherboards use both by using DDR memory in a dual-channel configuration.

Operation[edit]

Dual-channel architecture requires a dual-channel-capable motherboard and two or more DDR, DDR2, DDR3, DDR4, or DDR5 memory modules. The memory modules are installed into matching banks, each of which belongs to a different channel). The motherboard's manual will provide an explanation of how to install memory for that particular unit. A matched pair of memory modules may usually be placed in the first bank of each channel, and a different-capacity pair of modules in the second bank.^[6] Modules rated at different speeds can be run in dual-channel mode, although the motherboard will then run all memory modules at the speed of the slowest module. Some motherboards, however, have compatibility issues with certain brands or models of memory when attempting to use them in dual-channel mode. For this reason, it is generally advised to use identical pairs of memory modules, which is why most memory manufacturers now sell 'kits' of matched-pair DIMMs. Several motherboard manufacturers only support configurations where a 'matched pair' of modules are used. A matching pair needs to match in:

• Capacity (e.g. 1024 MB). Certain Intel chipsets support different capacity chips in what they call Flex Mode: the capacity that can be matched is run in dual-channel, while the remainder runs in single-channel.
• Speed (e.g. PC5300). If speed is not the same, the lower speed of the two modules will be used. Likewise, the higher latency of the two modules will be used.
• Same CAS Latency (CL) or Column Address Strobe.
• Number of chips and sides (e.g. two sides with four chips on each side).
• Matching size of rows and columns.

Dual-channel architecture is a technology implemented on motherboards by the motherboard manufacturer and does not apply to memory modules. Theoretically any matched pair of memory modules may be used in either single- or dual-channel operation, provided the motherboard supports this architecture.

Performance[edit]

Theoretically, dual-channel configurations double the memory bandwidth when compared to single-channel configurations. This should not be confused with double data rate (DDR) memory, which doubles the usage of DRAM bus by transferring data both on the rising and falling edges of the memory bus clock signals.

Tom's Hardware found little significant difference between single-channel and dual-channel configurations in synthetic and gaming benchmarks (using a 'modern (2007)' system setup). In its tests, dual-channel gave at best a 5% speed increase in memory-intensive tasks.^[7] Another comparison by Laptop logic resulted in a similar conclusion for integrated graphics.^[8] The test results published by Tom's Hardware had a discrete graphics comparison.

Another benchmark performed by TweakTown, using SiSoftware Sandra, measured around 70% increase in performance of a quadruple-channel configuration, when compared to a dual-channel configuration.^{[9]:p. 5} Other tests performed by TweakTown on the same subject showed no significant differences in performance, leading to a conclusion that not all benchmark software is up to the task of exploiting increased parallelism offered by the multi-channel memory configurations.^{[9]:p. 6}

Ganged versus unganged[edit]

Dual-channel was originally conceived as a way to maximize memory throughput by combining two 64-bit buses into a single 128-bit bus.^{[disputed][citation needed]} This is retrospectively called the 'ganged' mode. However, due to lackluster performance gains in consumer applications,^[10] more modern implementations of dual-channel use the 'unganged' mode by default, which maintains two 64-bit memory buses but allows independent access to each channel, in support of multithreading with multi-core processors.^[11][12]

'Ganged' versus 'unganged' difference could also be envisioned as an analogy with the way RAID 0 works, when compared to JBOD.^[13] With RAID 0 (which is analogous to 'ganged' mode), it is up to the additional logic layer to provide better (ideally even) usage of all available hardware units (storage devices, or memory modules) and increased overall performance. On the other hand, with JBOD (which is analogous to 'unganged' mode) it is relied on the statistical usage patterns to ensure increased overall performance through even usage of all available hardware units.^[11][12]

Triple-channel architecture[edit]

Operation[edit]

DDR3 triple-channel architecture is used in the IntelCore i7-900 series (the Intel Core i7-800 series only support up to dual-channel). The LGA 1366 platform (e.g. Intel X58) supports DDR3 triple-channel, normally 1333 and 1600Mhz, but can run at higher clock speeds on certain motherboards. AMD Socket AM3 processors do not use the DDR3 triple-channel architecture but instead use dual-channel DDR3 memory. The same applies to the Intel Core i3, Core i5 and Core i7-800 series, which are used on the LGA 1156 platforms (e.g., Intel P55). According to Intel, a Core i7 with DDR3 operating at 1066 MHz will offer peak data transfer rates of 25.6 GB/s when operating in triple-channel interleaved mode. This, Intel claims, leads to faster system performance as well as higher performance per watt.^[14]

When operating in triple-channel mode, memory latency is reduced due to interleaving, meaning that each module is accessed sequentially for smaller bits of data rather than completely filling up one module before accessing the next one. Data is spread amongst the modules in an alternating pattern, potentially tripling available memory bandwidth for the same amount of data, as opposed to storing it all on one module.

The architecture can only be used when all three, or a multiple of three, memory modules are identical in capacity and speed, and are placed in three-channel slots. When two memory modules are installed, the architecture will operate in dual-channel architecture mode.^[15]

Dimm Memory Slots X4 Definition 1

Supporting processors[edit]

Quad-channel architecture[edit]

Operation[edit]

Quad-channel DDR4 has replaced DDR3 on the Intel X99LGA 2011 platform, and is also used in AMD's Threadripper platform.^[18]DDR3 quad-channel architecture is used in the AMDG34 platform and in the Intel X79LGA 2011 platform. AMD processors for the C32 platform and Intel processors for the LGA 1155 platform (e.g., Intel Z68) use dual-channel DDR3 memory instead.

The architecture can be used only when all four memory modules (or a multiple of four) are identical in capacity and speed, and are placed in quad-channel slots. When two memory modules are installed, the architecture will operate in a dual-channel mode; when three memory modules are installed, the architecture will operate in a triple-channel mode.^[15]

Supporting processors[edit]

Six-channel architecture[edit]

Supported by Qualcomm Centriq server processors^[21], and Intel Xeon Scalable processors.^[22]

Eight-channel architecture[edit]

Supported by AMD Epyc and Cavium ThunderX2 server processors.^[23][24]

See also[edit]

References[edit]

1. ^Jacob, Bruce; Ng, Spencer; Wang, David (2007). Memory systems: cache, DRAM, disk. Morgan Kaufmann. p. 318. ISBN978-0-12-379751-3.
2. ^ ^ab'Opteron 6000 Series Platform Quick Reference Guide'(PDF). AMD. Retrieved 2012-10-15.
3. ^5000P memory controller, Intel.
4. ^Intel LGA2011 socket x68 express chipset pictured, Tech power up.
5. ^John H. Zurawski; John E. Murray; Paul J. Lemmon, 'The Design and Verification of the AlphaStation 600 5-series Workstation', HP, 7 (1).
6. ^'Intel Dual-Channel DDR Memory Architecture White Paper'(PDF) (Rev. 1.0 ed.). Infineon Technologies North America and Kingston Technology. September 2003. Archived from the original(PDF, 1021 KB) on 2011-09-29. Retrieved 2007-09-06.
7. ^'Part 2: RAM and HDD', Parallel Processing, Tom's Hardware.
8. ^Intel's Sonoma Platform: Dual Channel Performance, Laptop logic.
9. ^ ^abShawn Baker (2011-11-16). 'Intel X79 Quad Channel and Z68 Dual Channel Memory Performance Analysis'. TweakTown. Retrieved 2013-11-30.
10. ^'AMD Phenom X4 Memory Controller in the Ganged/ Unganged Mode'. ixbtlabs.com. 2008-08-16. Retrieved 2014-01-09.
11. ^ ^abGionatan Danti (2010-06-17). 'The Phenom / PhenomII memory controller: ganged vs unganged mode benchmarked'. ilsistemista.net. Retrieved 2014-01-09.
12. ^ ^ab'BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors'(PDF). amd.com. 2013-01-11. pp. 107–108. Retrieved 2014-01-09. When the DCTs are in ganged mode, as specified by [The DRAM Controller Select Low Register] F2x110 [DctGangEn], then each logical DIMM is two channels wide. Each physical DIMM of a 2-channel logical DIMM is required to be the same size and use the same timing parameters. Both DCTs must be programmed with the same information (see 2.8.1 [DCT Configuration Registers]). When the DCTs are in unganged mode, a logical DIMM is equivalent to a 64-bit physical DIMM and each channel is controlled by a different DCT. Typical systems are recommended to run in unganged mode to benefit from the additional parallelism generated by using the DCTs independently. See 2.12.2 [DRAM Considerations for ECC] for DRAM ECC implications of ganged and unganged mode. Ganged mode is not supported for S1g3, S1g4, ASB2, and G34 processors.
13. ^Rouse, Margaret (September 2005). 'JBOD (just a bunch of disks or just a bunch of drives)'. SearchStorage.TechTarget.com. Retrieved 2014-01-09.
14. ^X58 Product Brief(PDF), Intel
15. ^ ^abDesktop Boards – Triple Memory Modules, Intel
16. ^'Core i7 Family Product Comparison'. Intel. Memory Specifications: # of Memory Channels.
17. ^'Xeon Family Product Comparison'. Intel. Memory Specifications: # of Memory Channels.
18. ^AMD Ryzen Threadripper And Vega Attack Prey At 4K, Quad GPUs Shred Blender, Radeon RX Vega Hits In July, '....with 16 cores and 32 threads with support for quad-channel DDR4 memory......'
19. ^'AMD Opteron 6200 Series Processor Quick Reference Guide'(PDF). Retrieved 2012-10-15.
20. ^'AMD Opteron 6300 Series processor Quick Reference Guide'(PDF). Retrieved 2013-12-11.
21. ^Kennedy, Patrick (23 August 2017). 'Qualcomm Centriq 2400 ARM CPU from Hot Chips 29'. Serve The Home. Retrieved 14 November 2017.
22. ^https://www.intel.in/content/www/in/en/products/processors/xeon/scalable/bronze-processors/bronze-3106.html
23. ^Cutress, Ian (7 March 2017). 'AMD Prepares 32-Core Naples CPUs for 1P and 2P Servers: Coming in Q2'. Anandtech. Retrieved 7 March 2017.
24. ^Kennedy, Patrick (9 November 2017). 'Cavium ThunderX2 and OCP Platform Details'. Serve the Home. Retrieved 14 November 2017.

External links[edit]

• 'Single, dual, triple and flex memory modes', Desktop motherboards support, Intel.
• Everything You Need to Know About the Dual-, Triple-, and Quad-Channel Memory Architectures, November 2011, Hardware Secrets
• Memory Configuration Guide for X9 Series DP Motherboards – Revised Ivy Bridge Update (Socket R & B2), January 2014, Super Micro Computer, Inc.
• DDR3 Memory Frequency Guide, May 2012, AMD (archived)